Now if you’re starting to get a creepy feeling that maybe this is going to be more of a marketing-based name change than a genuine change in transistor size – something akin to the switch between 14nm and 12nm – then I’m right there with you. TSMC has, after all, claimed the new lithography is going to be fully compatible with the design rules of the existing 7nm tech, so products built on the previous lithography can be iterated upon very quickly.
That said, TSMC is promising around 18% higher logic density from the 6nm parts, which could perhaps indicate more of a genuine real world die-shrink. That, and the fact that TSMC isn’t expecting to even get to risk production until the first quarter of next year. Though the density boost does seem in line with what was promised from the EUV-based 7nm+ design, so I’m still a little confused about what the difference actually is between 7nm+ and 6nm. Especially considering TSMC’s 5nm node is already under risk production at the moment and should appear before 6nm… these transistor numbers are starting to lose all meaning to me.